PIPages
Labs

Nathaniel Bleier

University of Michigan, MI·Computer Science

Specialized computer chips called accelerators run voice recognition in phones, driver assistance in cars, medical imaging machines and data centers. Designing one is hard because choices about which operations to build into silicon, how to lay out circuits and how to translate software onto the chip all affect one another.

Fields

Computer Science

Engineering

Topics

hardware-software co-design

hardware accelerators

neuro-symbolic reasoning

Grants
1 known grant, through Aug 2030

What they work on

  1. Combine learning-guided program synthesis with automated logical reasoning to generate instruction sequences, accelerator control codes and microcoded expansions that are formally proven equivalent to the original program.
  2. Use equality saturation, a compact representation of many equivalent programs, with integer-programming extraction to jointly optimize a chip's instruction set, microarchitecture parameters and software transformations.
  3. Apply inductive proof techniques from hardware verification to detect redundant circuitry when a chip runs a known class of workloads, automatically pruning general-purpose designs into compact application-specific ones.
  4. Validate the framework on application-specific instruction-set processors and domain-specific accelerators, measuring area, power, performance and correctness on standard embedded benchmarks.

More about the research

Designers either explore these choices by hand for years or use automated tools that can produce inefficient or incorrect designs. As artificial intelligence strains electricity supplies, these mistakes grow more costly.

Why it matters

Faster, provably correct chip design tools could help engineers build smaller, more energy-efficient accelerators for cars, medical devices and AI data centers, where errors and wasted power are costly. Open-source release could lower barriers for chip designers outside large companies.

Known grants

From NIH and NSF research grants. Labs often have other funding we can't see.

FET: Neuro-Symbolic Reasoning for Verified Hardware-Software Co-Design

NSF · Sep 2026 – Aug 2030

Closest labs

Bo Yuan

Rutgers University-New Brunswick, NJ·Engineering·Early-career

Develop design principles for building domain expertise into learning-based robot motion planners, improving their reliability and performance in complex, resource-limited real-world settings.

Josep Torrellas

University of Illinois Urbana-Champaign, IL·Computer Science

Develop approximate algorithms for graph clustering in static and dynamic settings, graph construction that preserves key information, and machine learning, for computational biology, social network and software verification problems.

Soner Onder

Michigan Technological University, MI·Computer Science

Develop Vectorized Instruction Space (VIS), which converts control dependences into data dependences using an executable dynamic single-assignment form at the machine-instruction level, with lower overhead than traditional predication.

The school

University of Michigan: 124 labs on PI Pages, $2.1B a year on research, 963 research doctorates a year.

More about University of Michigan

Reach out

A start for your email. Fill in the brackets.